DDR-CONFIG-AM62

DDR Configuration Tool

未找到结果。请清除搜索并重试。

AM620-Q1 — 适用于驾驶员监控、网络和 V2X 系统且具有嵌入式安全功能的汽车计算 SoC

AM623 — 具有基于 Arm® Cortex®-A53 的对象和手势识别功能的物联网 (IoT) 和网关 SoC

AM625 — 具有基于 Arm® Cortex®-A53 的边缘 AI 和全高清双显示的人机交互 SoC

AM625-Q1 — 适用于数字仪表组且具有嵌入式安全功能的汽车显示 SoC

SK-AM62-LP — 适用于低功耗 Sitara™ 处理器的 AM62x 入门套件

README.html

This tool is intended to simplify the process of configuring the DDR Subsystem Controller and PHY to interface with DRAM memory devices.

adding support for AM62Lx
added device selections for Nanya DDR4 and LPDDR4 memories for AM64x, AM62x, AM62Ax
added checks for TCR mode in DDR4 for AM62x
allow disable of Read DBI for DDR4 memories which don't support DBI (not recommended)
fixed bug with SOC ODT FSP1
\