SN65CML100EVM
SN65CML100 评估模块]]
SN65CML100EVM
概述
The EVM allows evaluation of operation of theSN65LVDS100/101 or SN65CML100 high-speed differential translators/repeaters. Differential input signals (LVDS, LVPECL, CML, etc.) can be applied and the device output can beobserved across on board terminations, or via direct connection to 50-ohm oscilloscope inputs. Single-ended LVPECL signals can also be applied by using the Vbb reference output voltage provided by either the SN65LVDS100/101 or SN65CML100 devices from TI.
特性
Hardware: SN65LVDS100/101EVM or SN65CML100EVM PWB
- Screw-type SMA jacks serve as the I/O connectors
- Banana jacks serve as the DC power input terminals
LVDS、M-LVDS 和 PECL IC
技术文档
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| 类型 | 标题 | 下载最新的英语版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | EVM 用户指南 | 2-GBPS Differential Repeater EVM (Rev. A) | 2002-11-11 | |||
| 证书 | SN65CML100EVM EU Declaration of Conformity (DoC) | 2019-1-2 | ||||
| 数据表 | SN65LVDx10x Differential Translator/Repeater 数据表 (Rev. E) | PDF | HTML | 2015-7-20 | |||
| 数据表 | 1.5-Gbps LVDS/LVPECL/CML-to-CML Translator/Repeater 数据表 | 2002-11-11 |