This ethernet brick reference design provides a simplified solution that eliminates the need to have multiple boards for copper or fiber interface. It uses a small form factor, low power 10/100 Mbps ethernet transceiver to reduce board size for a cost optimized and scalable solution with reduced power consumption in high temperature industrial applications. The DP83822 provides all physical layer functions needed to transmit and receive data over both standard twisted-pair cables or connect to an external fiber optic (SC or ST or SFP) transceiver. The design provides option to configure different power supply levels for Analog and IO supply using fixed or programmable LDOs. The brick is interfaced to TM4C129X TIVA™ MCU with internal MAC. The design is tested for radiated emission, ESD and EFT as per IEC61000-4 standard level 4.
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
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Reference design overview and verified performance test data
Detailed overview of design layout for component placement
Complete listing of design components, reference designators, and manufacturers/part numbers
Files used for 3D models or 2D drawings of IC components
Design file that contains information on physical board layer of design PCB
PCB layer plot file used for generating PCB design layout
Detailed schematic diagram for design layout and components
Includes TI products in the design and potential alternatives.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Design guide | EMI-Compliant, 125°C 10/100-Mbps Ethernet Brick Reference Design (Rev. C) | Jan 31, 2018 | |
| Technical article | Overcoming Ethernet connectivity challenges on the power grid | PDF | HTML | Jun 27, 2019 | |
| Technical article | Two ways to save power with low-power Ethernet | PDF | HTML | Nov 17, 2016 |
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