| adc07d1520 Project Status | |||
| Project File: | ADC07D1520.xise | Parser Errors: | No Errors |
| Module Name: | adc07d1520 | Implementation State: | New |
| Target Device: | xc4vlx25-11ff668 |
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| Product Version: | ISE 12.2 |
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| Design Goal: | Balanced |
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| Design Strategy: | Xilinx Default (unlocked) |
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| Environment: |
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| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | ||||||
| Translation Report | ||||||
| Map Report | ||||||
| Place and Route Report | ||||||
| Power Report | ||||||
| Post-PAR Static Timing Report | ||||||
| Bitgen Report | ||||||
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |