SNAS512K
September 2011 – October 2025
LMK00301
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Parameter Measurement Information
7.1
Differential Voltage Measurement Terminology
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
VCC and VCCO Power Supplies
8.4
Device Functional Modes
8.4.1
Clock Inputs
8.4.2
Clock Outputs
8.4.2.1
Reference Output
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Driving the Clock Inputs
9.2.1.2
Crystal Interface
9.2.2
Detailed Design Procedure
9.2.2.1
Termination and Use of Clock Drivers
9.2.2.1.1
Termination for DC Coupled Differential Operation
9.2.2.1.2
Termination for AC Coupled Differential Operation
9.2.2.1.3
Termination for Single-Ended Operation
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.3.1
Power Supply Sequencing
9.3.2
Current Consumption and Power Dissipation Calculations
9.3.2.1
Power Dissipation Example #1: Separate VCC and VCCO Supplies with Unused Outputs
9.3.2.2
Power Dissipation Example #2: Worst-Case Dissipation
9.3.3
Power Supply Bypassing
9.3.3.1
Power Supply Ripple Rejection
9.3.4
Thermal Management
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RHS|48
MPQF159B
Thermal pad, mechanical data (Package|Pins)
RHS|48
QFND509A
Orderable Information
snas512k_oa
snas512k_pm
Data Sheet
LMK00301 3GHz 10-Output Ultra-Low Additive Jitter
Differential Clock Buffer and Level Translator