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  • TI mmWave xWRLx432 Bootloader Flow and Warm Reset Recommendations

    • SWRU622A August   2024  – September 2024 AWRL1432 , AWRL6432 , IWRL1432 , IWRL6432 , IWRL6432AOP

       

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  • TI mmWave xWRLx432 Bootloader Flow and Warm Reset Recommendations
  1.   1
  2.   Trademarks
  3. 1Introduction
  4. 2Basic Bootloader Flow
    1. 2.1 Programming Serial Data Flash Over UART (Bootloader Service)
    2. 2.2 Binary File Format
    3. 2.3 Flash Programming Sequence
    4. 2.4 Supported UART Commands/Response and Format
    5. 2.5 Flashing Sequence
    6. 2.6 ROM-Assisted Image Download Sequence
    7. 2.7 Booting Application Image
      1. 2.7.1 Booting From Serial Flash
      2. 2.7.2 Bootmode – SPI
      3. 2.7.3 Bootmode - UART
  5. 3Secondary Bootloader
    1. 3.1 SBL Execution Flow
      1. 3.1.1 Flash Memory Partitioning for SBL Execution
      2. 3.1.2 SBL Feature Modifications
      3. 3.1.3 SBL Development Considerations
  6. 4Warm Reset
    1. 4.1 Integrity Verification
    2. 4.2 LSTC/PBIST
    3. 4.3 Watchdog Timer
    4. 4.4 Reset-Triggered Flash Reload of Application
      1. 4.4.1 Hardware Solutions
        1. 4.4.1.1 PMIC I2C Messaging
        2. 4.4.1.2 External Watchdog Timer
        3. 4.4.1.3 External Voltage Monitoring or Voltage Supervisors
      2. 4.4.2 Software Solutions
        1. 4.4.2.1 Setting Boot Vector to 0x0
  7. 5Relevant Registers
    1. 5.1 Reset Registers
    2. 5.2 PC Registers
      1. 5.2.1 Addresses
  8. 6Revision History
  9. IMPORTANT NOTICE
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User's Guide

TI mmWave xWRLx432 Bootloader Flow and Warm Reset Recommendations

Trademarks

Spansion® is a registered trademark of Spansion LLC.

Macronix® is a registered trademark of Macronix International Co., Ltd.

All trademarks are the property of their respective owners.

1 Introduction

This document details how to utilize the ROM Bootloader(RBL) in a variety of different use-cases and resolve issues that may arise from using the RBL in these scenarios. In addition, due to the rigidity of the RBL (as it is programmed into the device ROM), this document also introduces the secondary bootloader(SBL), which provides greater flexibility in what can be loaded onto the device (primary and secondary image or multiple unique user applications) and how it can be loaded (via any serial streaming interface). Lastly this document covers reset behavior, with a focus on warm reset behavior on the xWRLx432 and considerations to be made in user application design and hardware design.

This document provides a better understanding of how the application software interacts with the RBL/SBL and how it can leverage the RBL and SBL for varying levels of host-control during booting and reset procedures. Complete implementation details on the RBL and the SBL can be found in the xWRLx432 TRM.

 Device Initialization Figure 1-1 Device Initialization

Above is an overview of the initialization process and is detailed below:

  • Preinitialization: Power, clock, and control connections must be present, and the boot configuration pins must be held at the desired logical levels
  • Power, clock, reset ramp sequence: Specific sequence that is applied by the power-management chip
  • ROM bootloader (RBL): Responsible for finding, downloading, and executing the initial software
  • Initial Software: Secondary bootloader/other boot-emulation software
  • Application Image: The application that runs on the main core/processor

Once the device is in functional mode, the RBL ensures that the application image is properly transferred over to RAM and hands control of the device to the user application. If this flow is interrupted by any common failure, the device goes into a safe state and will not boot the user application.

2 Basic Bootloader Flow

This section primarily focuses on the bootloader flow in functional mode. Figure 2-1 shows the bootloader flow from the start of RBL execution in functional mode.

 Basic Bootloader Flow
                    Chart Figure 2-1 Basic Bootloader Flow Chart
Note: Load from SFLASH or download over SPI/UART is only performed in the STC_PORZ path of Figure 2-1.

 

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