The LP5562 is a four-channel LED driver designed to produce variety of lighting effects. The device has a program memory for creating variety of lighting sequences. When the program memory has been loaded, the LP5562 can operate independently without processor control.
The LP5562 is able to automatically enter power save mode, when LED outputs are not active and thus lowering current consumption.
Four independent LED channels have accurate programmable current sinks, from 0 mA to 25.5 mA with 100-μA steps and flexible PWM control. Each channel can be configured into each of the three program execution engines. Program execution engines have program memory for creating desired lighting sequences with PWM control.
The LP5562 has four pin-selectable I2C addresses. This allows connecting up to four parallel devices in one I2C bus. The device requires only one small, low-cost ceramic capacitor.
PART NUMBER | PACKAGE | BODY SIZE (MAX) |
---|---|---|
LP5562 | DSBGA (12) | 1.648 mm × 1.248 mm |
Changes from A Revision (September 2015) to B Revision
Changes from * Revision (April 2013) to A Revision
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NUMBER | NAME | ||
A1 | W | A | LED driver current sink terminal |
A2 | VDD | P | Power supply |
A3 | CLK_32K | I | External 32-kHz clock input |
A4 | B | A | LED driver current sink terminal |
B1 | ADDR_SEL1 | I | I2C address selection pin |
B2 | ADDR_SEL0 | I | I2C address selection pin |
B3 | GND | G | Ground |
B4 | G | A | LED driver current sink terminal |
C1 | SDA | I/O | I2C serial interface data input/output |
C2 | SCL | I | I2C serial interface clock |
C3 | EN/VCC | P | Enable/Logic power supply |
C4 | R | A | LED driver current sink terminal |
MIN | MAX | UNIT | ||
---|---|---|---|---|
V (VDD, VEN/VCC, R, G, B, W) | −0.3 | 6 | V | |
Voltage on pins | −0.3 | VDD + 0.3 with 6 V maximum | V | |
Continuous power dissipation(2) | Internally limited | |||
Junction temperature, TJ-MAX | 125 | °C | ||
Maximum lead temperature (soldering) | See(3) | |||
Storage temperature, Tstg | −65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±1000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±250 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VDD | 2.7 | 5.5 | V | ||
VEN/VCC | 1.65 | VDD | V | ||
Junction temperature, TJ | −40 | 125 | °C | ||
Ambient temperature, TA(1) | −40 | 85 | °C |
THERMAL METRIC(1) | LP5562 | UNIT | |
---|---|---|---|
YQE (DSBGA) | |||
12 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 85.9 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 1.0 | °C/W |
RθJB | Junction-to-board thermal resistance | 15.3 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.6 | °C/W |
ψJB | Junction-to-board characterization parameter | 15.4 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
CURRENT CONSUMPTION AND OSCILLATOR ELECTRICAL CHARACTERISTICS | ||||||
IVDD | Standby supply current | EN = 0 (pin), CHIP_EN = 0 (bit), external 32 kHz clock running or not running | 0.2 | 2 | µA | |
EN = 1 (pin), CHIP_EN = 0 (bit), external 32 kHz clock not running |
2 | µA | ||||
EN = 1 (pin), CHIP_EN = 0 (bit) External 32-kHz clock running |
2.4 | µA | ||||
Normal mode supply current | LED drivers disabled | 0.25 | mA | |||
LED drivers enabled | 1 | mA | ||||
Powersave mode supply current | External 32-kHz clock running | 10 | µA | |||
Internal oscillator running | 0.25 | mA | ||||
ƒOSC | Internal oscillator frequency accuracy | TA = 25°C | –4% | 4% | ||
–7% | 7% | |||||
LED DRIVER ELECTRICAL CHARACTERISTICS (R, G, B, W OUTPUTS) | ||||||
ILEAKAGE | R, G, B, W pin leakage current | TA = 25°C | 0.1 | 1 | µA | |
IMAX | Maximum source current | Outputs R, G, B, W | 25.5 | mA | ||
IOUT | Accuracy of output current(4) | Output current set to 17.5 mA, VDD = 3.6 V TA = 25°C |
–4% | 4% | ||
Output current set to 17.5 mA, VDD = 3.6 V | –5% | 5% | ||||
IMATCH | Matching(4) | Output current set to 17.5 mA, VDD = 3.6V | 1% | 2% | ||
ƒLED | LED PWM switching frequency | PWM_HF = 1 | 558 | Hz | ||
PWM_HF = 0 | 256 | |||||
VSAT | Saturation voltage(5) | Output current set to 17.5 mA TA = 25°C |
60 | 100 | mV |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
LOGIC INPUT EN | ||||||
VIL | Input low level | 0.5 | V | |||
VIH | Input high level | 1.2 | V | |||
II | Logic input current | –1 | 1 | µA | ||
tDELAY | Input delay(1) | 2 | µs | |||
LOGIC INPUT SCL, SDA, CLK_32K, ADDR_SEL0, ADDR_SEL1, VEN = 1.8 V | ||||||
VIL | Input low level | 0.2 × VEN | V | |||
VIH | Input high level | 0.8 × VEN | V | |||
II | Input current | –1 | 1 | µA | ||
ƒCLK_32K | Clock frequency | 32 | kHz | |||
ƒSCL | Clock frequency | 400 | kHz | |||
LOGIC OUTPUT SDA | ||||||
VOL | Output low level | IOUT = 3 mA (pullup current) | 0.3 | 0.5 | V | |
IL | Output leakage current | 1 | µA |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
LOGIC INPUT CLK_32K | ||||||
ƒCLK_32K | Clock frequency | 32.7 | kHz | |||
tCLKH | High time | 6 | µs | |||
tCLKL | Low time | 6 | µs | |||
tr | Clock rise time | 10% to 90% | 2 | µs | ||
tf | Clock fall time | 90% to 10% | 2 | µs |
MIN | MAX | UNIT | ||
---|---|---|---|---|
ƒSCL | Clock frequency | 400 | kHz | |
1 | Hold time (repeated) START condition | 0.6 | µs | |
2 | Clock low time | 1.3 | µs | |
3 | Clock high time | 600 | ns | |
4 | Setup time for a repeated START condition | 600 | ns | |
5 | Data hold time | 50 | ns | |
6 | Data setup time | 100 | ns | |
7 | Rise time of SDA and SCL | 20 + 0.1Cb | 300 | ns |
8 | Fall time of SDA and SCL | 15 + 0.1Cb | 300 | ns |
9 | Set-up time for STOP condition | 600 | ns | |
10 | Bus-free time between a STOP and a START condition | 1.3 | µs | |
Cb | Capacitive load for each bus line | 10 | 200 | pF |