• Menu
  • Product
  • Email
  • PDF
  • Order now
  • Space-Grade, 100-krad, Discrete, Three Op Amp Instrumentation Amplifier Circuit

    • SNOAA71 June   2021 LMP7704-SP , OPA4277-SP

       

  • CONTENTS
  • SEARCH
  • Space-Grade, 100-krad, Discrete, Three Op Amp Instrumentation Amplifier Circuit
  1.   1
  2.   2
  3.   3
  4.   4
  5.   5
  6. 16
  7.   7
  8.   8
  9.   9
  10. IMPORTANT NOTICE
search No matches found.
  • Full reading width
    • Full reading width
    • Comfortable reading width
    • Expanded reading width
  • Card for each section
  • Card with all content

 

CIRCUIT DESIGN

Space-Grade, 100-krad, Discrete, Three Op Amp Instrumentation Amplifier Circuit

Design Goals

Input Output Common-mode Voltage Supply Total Ionizing Dose SEL Immunity
Vd_min Vd_max Vout_min Vout_max Vcm V+ V- Vref ≥ 100krad(Si) ≥ 85 MeV·cm2/mg
–50 mV 50 mV 0.2 V 5 V 5 V 10 V 0 V 2.6 V

Design Description

This design uses discrete op amps to implement an instrumentation amplifier (IA) design using space-grade (SP) components for use in space applications. The circuit converts a differential signal to a single-ended output signal. Linear operation of an instrumentation amplifier depends upon linear operation of its building block: op amps. An op amp operates linearly when the input and output signals are within the respective input common-mode and output swing ranges of the device. The supply voltages used to power the op amps define these ranges.

GUID-20210316-CA0I-7K01-WMRH-4HRFVB998ZK2-low.png

Design Notes

  1. Use low-tolerance resistors to achieve high DC CMRR performance. Mismatching of resistors can also lead to errors in gain and output accuracy.
  2. All resistors and capacitors must be verified space-grade for this design.
  3. Rg sets the gain of the input stage. R1a and R1b can be used to set the gain of the second stage (see Design Steps).
  4. Rf1 and Rf2 are nominally matched in this design. In general, Rf1 and Rf2 do not need to be matched – it may be desirable in some cases to have Rf1 and Rf2 unmatched so that the top amplifier and bottom amplifier in the input stage have different gains. For example, if Vcm is not at mid-supply but is closer to one of the rails, Rf1 and Rf2 can be tuned so that neither of the input stage amplifiers run out of headroom.
  5. Integrated instrumentation amplifiers normally have a fixed minimum gain. In addition to using an IA in high-gain configurations, constructing a discrete IA like this affords the flexibility to achieve any gain less than 1 V/V.
  6. High-value resistors can degrade the phase margin of the circuit and introduce additional noise in the circuit.
  7. Add an isolation resistor to the output stage to drive large capacitive loads.
  8. Linear operation is contingent upon the input common-mode and the output swing ranges of the discrete op amps used. For best performance, choose Vcm = (V+ + V–) / 2 (mid-supply).
  9. C2 along with R3 || R4 forms a low-pass filter with a corner frequency of 147.16 Hz.
  10. The Vref pin must be supplied by a low-impedance reference that can sink and source current, such as a buffer. Using a high-impedance reference, such as a resistor divider with no buffer, may result in a mismatch and degradation of CMRR.
  11. Vout_min is chosen as 0.2 V for this design to avoid nonlinearities associated with the output of LMP7704-SP swinging too close to the rail. If this design is done with a different op amp, be sure to check the data sheet to determine the minimum and maximum output values allowed.
  12. The LMP7704-SP supply voltage of 10 V was selected according the derating specifications provided by the National Aeronautics and Space Administration (NASA) in document EEE-INST-002 (April 2008) and the European Cooperation for Space Standardization (ECSS) in document ECSS-Q-ST-30-11C Rev.1 (4 October 2011). The documents specify an 80% and 90% derating of the absolute maximum supply voltage for linear ICs, respectively.
  13. This design can be implemented with a single 4-channel LMP7704-SP or a similar device. See Design Alternative Op Amp for a wider supply op amp (36 V). Note that the listed alternative device meets TID = 50 krad(Si).

Design Steps

  1. Calculate the output voltage Vout for this circuit using the following equation:
    GUID-20210628-CA0I-H2BN-J85C-X8BHZRB4KTS5-low.gif
    In this equation, Vd = V2 – V1 is the differential input voltage, Vref is set by R3 and R4 to level shift the output, and it is assumed that R1a = R2a and R1b = R2b. Integrated instrumentation amplifiers normally fix Rf1, Rf2, R1a, R2a, R1b, and R2b, leaving only Rg to set the gain of the circuit. In this discrete implementation, the designer has the freedom to alter all of these resistors, but the transfer function can be simplified by using standard values, such as Rf1 = Rf2 = R1a = R1b = R2a = R2b = 10kΩ, and using only Rg to set the gain. In this case, Rg can be calculated using the following simplified equation:
    GUID-20210628-CA0I-MXX6-SZX3-XWQCSSWLLFPP-low.gif
  2. Set Vref. For this design, Vref has been set as shown in the following equation so that a symmetric input voltage range of –50mV to +50mV results in an output voltage range of 0.2V to 5V.
    GUID-20210628-CA0I-9KZM-FFHC-PW673R30XB0Z-low.gif
    GUID-20210628-CA0I-KXVH-LRXZ-FQQT1CXSTHN6-low.gif
    R4 = 13.83kΩ ≈ 13.8kΩ (standard value)
    Note: The magnitudes of R3 and R4 were chosen such that R3 || R4 is close to 10kΩ so that the low-pass filter formed by R3 || R4 and C2 is close to the common low-pass filter with R = 10kΩ and C = 100nF.

  3. Choose Rg to set the required gain using the simplified transfer function.
    GUID-20210628-CA0I-MNZS-R4LS-7B7SG11PDZS9-low.gif
    Rg = 425Ω ≈ 427Ω (standard value)
    This corresponds to a gain of:
    GUID-20210628-CA0I-B9DK-RVDL-3KSVMK2J2PXB-low.gif

 

Texas Instruments

© Copyright 1995-2025 Texas Instruments Incorporated. All rights reserved.
Submit documentation feedback | IMPORTANT NOTICE | Trademarks | Privacy policy | Cookie policy | Terms of use | Terms of sale