The Texas Instruments' FPD-Link III family of products (Table 1-1) offers an internal test pattern generator. This feature provides a user-friendly method for quickly debugging and testing both integrated displays, as well as the link between the serializer and deserializer. This app note focuses specifically on FPD Link III IVI (In Vehicle Infotainment) devices for display applications (94x and 92x).

The internal test patterns are simple and repetitive in order to allow quick visual verification of system and display panel operation. As long as the device is not in power down mode, a test pattern can be generated, even if the device is not linked to a source. If no clock is received, the test pattern can be configured to use an internally generated programmable pixel clock.

Video timing may be based on external control signals (HS, VS, DE) provided at the serializer inputs, or they may be generated internally by either the serializer or the deserializer (Figure 2-1).

Figure 2-1 Configuration Options

No pin configuration is required to enable or control the pattern generation feature. All aspects of pattern generation are controlled through the device control registers, accessible locally through the device I2C interface, or remotely via the FPD-Link III bidirectional control channel. The test pattern generation feature is able to handle a wide range of display timings and test image options:

• Five pre-configured solid color outputs
• One user-configurable solid color output
• Horizontal ramp over full dynamic range of red, green, blue, or white
• Vertical ramp over full dynamic range of red, green, blue, or white
• Automatic scaling of brightness ramps based on frame size
• VCOM, Checkerboard, and Color Bars patterns (For all devices listed in Table 1-1 except DS90UB921-Q1, DS90Ux925Q-Q1, and DS90Ux926Q-Q1)
• Optional color inversion
• Flexible Auto-scrolling mechanism that rotates through a user-defined list of patterns
• Fully programmable internal video clock and timing generation
• Optional 18-bit color mode

By default, the pattern generator operates in 24-bit color mode (RGB888), where all 8 bits of the Red, Green, and Blue sub-pixels are active. 18-bit color mode (RGB666) may be enabled from the control registers (Table 3-1). In 18-bit mode, the 6 MSBs (bits 7-2) of the Red, Green, and Blue sub-pixels are enabled; the two least significant bits idle low.