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  • TPS5516x-Q1Functional Safety FIT Rate, FMD and Pin FMA

    • SLVAEX6 August   2020  – MONTH  TPS55160-Q1 , TPS55162-Q1 , TPS55165-Q1

       

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  • TPS5516x-Q1Functional Safety FIT Rate, FMD and Pin FMA
  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
  6. IMPORTANT NOTICE
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FUNCTIONAL SAFETY FIT RATE, FMD AND PIN-FMA

TPS5516x-Q1Functional Safety FIT Rate, FMD and Pin FMA

Trademarks

All other trademarks are the property of their respective owners.

1 Overview

This document contains information for TPS5516x-Q1 (HTSSOP package) to aid in a functional safety system design. Information provided are:

  • Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (Pin FMA)

Figure 1-1 shows the device functional block diagram for reference.

GUID-3DAA5378-CC17-473A-8A70-F82BC082B09C-low.gif Figure 1-1 Functional Block Diagram

TPS5516x-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.

2 Functional Safety Failure In Time (FIT) Rates

This section provides Functional Safety Failure In Time (FIT) rates for TPS5516x-Q1 based on two different industry-wide used reliability standards:

  • Table 2-1 provides FIT rates based on IEC TR 62380 / ISO 26262 part 11
  • Table 2-2 provides FIT rates based on the Siemens Norm SN 29500-2
Table 2-1 Component Failure Rates per IEC TR 62380 / ISO 26262 Part 11
FIT IEC TR 62380 / ISO 26262FIT (Failures Per 109 Hours)
Total Component FIT Rate22
Die FIT Rate9
Package FIT Rate13

The failure rate and mission profile information in Table 2-1 comes from the Reliability data handbook IEC TR 62380 / ISO 26262 part 11:

  • Mission Profile: Motor Control from Table 11
  • Power dissipation: 1200 mW
  • Climate type: World-wide Table 8
  • Package factor (lambda 3): Table 17b
  • Substrate Material: FR4
  • EOS FIT rate assumed: 0 FIT
Table 2-2 Component Failure Rates per Siemens Norm SN 29500-2
TableCategoryReference FIT RateReference Virtual TJ
5CMOS/BICMOS ASICs Analog & Mixed =<50V supply60 FIT70 °C

The Reference FIT Rate and Reference Virtual TJ (junction temperature) in Table 2-2 come from the Siemens Norm SN 29500-2 tables 1 through 5. Failure rates under operating conditions are calculated from the reference failure rate and virtual junction temperature using conversion information in SN 29500-2 section 4.

3 Failure Mode Distribution (FMD)

The failure mode distribution estimation for TPS5516x-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.

Table 3-1 Die Failure Modes and Distribution
Die Failure ModesFailure Mode Distribution (%)
VOUT no output (HiZ)25%
VOUT out of specification high20%
VOUT out of specification low20%
VOUT functional, out for specification timing30%
PG false trip, fails to trip5%

 

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