DRV8876-Q1 Functional Safety FIT Rate, FMD and Pin FMA

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1 Overview

This document contains information for DRV8876-Q1 to aid in a functional safety system design. Information provided are:

Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
Component failure modes and their distribution (FMD) based on the primary function of the device
Pin failure mode analysis (Pin FMA)

DRV8876-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.

Figure 1-1 shows the functional block diagram for reference.

Figure 1-1 DRV8876-Q1 Device Block Diagram - HW variant

2 Functional Safety Failure In Time (FIT) Rates

This section provides Functional Safety Failure In Time (FIT) rates for DRV8876-Q1 based on two different industry-wide used reliability standards:

Table 2-1 provides FIT rates based on IEC TR 62380 / ISO 26262 part 11
Table 2-2 provides FIT rates based on the Siemens Norm SN 29500-2

Table 2-1 Component Failure Rates per IEC TR 62380 / ISO 26262 Part 11

FIT IEC TR 62380 / ISO 26262	FIT (Failures Per 10⁹ Hours)
Total Component FIT Rate	17
Die FIT Rate	6
Package FIT Rate	11

The failure rate and mission profile information in Table 2-1 comes from the Reliability data handbook IEC TR 62380 / ISO 26262 part 11:

Mission Profile: Motor Control from Table 11
Power dissipation: 0.730 W
Climate type: World-wide Table 8
Package factor (lambda 3): Table 17b
Substrate Material: FR4
EOS FIT rate assumed: 0 FIT

Table 2-2 Component Failure Rates per Siemens Norm SN 29500-2

Table	Category	Reference FIT Rate	Reference Virtual T_J
5	CMOS, BICMOS Digital, analog / mixed	25 FIT	55°C

The Reference FIT Rate and Reference Virtual T_J (junction temperature) in Table 2-2 come from the Siemens Norm SN 29500-2 tables 1 through 5. Failure rates under operating conditions are calculated from the reference failure rate and virtual junction temperature using conversion information in SN 29500-2 section 4.

3 Failure Mode Distribution (FMD)

The failure mode distribution estimation for DRV8876-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.

Table 3-1 Die Failure Modes and Distribution

Die Failure Modes	Failure Mode Distribution (%)
OUTx is stuck LOW when commanded OFF	14%
OUTx is stuck OFF when commanded LOW	8%
OUTx ON resistance too high when commanded LOW	12%
Low side slew rate too fast or too slow	5%
OUTx is stuck HIGH when commanded OFF	14%
OUTx is stuck OFF when commanded HIGH	8%
OUTx ON resistance too high when commanded HIGH	17%
High side slew rate too fast or too slow	5%
Dead-time is too short	1%
Current sense feedback incorrect	3%
ITRIP current regulation incorrect	3%
Incorrect communication or fault indication	10%