For several years Quad-flat no-leads (QFN) package with thermal pad have been standard starting point for high current designs. Technology and trends pushed buck converters to get even smaller and more efficient. Therefore, optimized PCB designs need to be considered to dissipate the heat efficiently through the PCB and enable low operating temperatures.

Especially for thermally-limited designs, mitigating the heat effectively from the Integrated Circuit (IC) through the Printed Circuit Board (PCB) has become paramount. The PCB is the actual carrier and heatsink of ICs and therefore the influence of PCB on ICs thermal capability should be analyzed. This necessitates an optimal PCB layout design to ensure reliable operation of ICs over a wide range of temperature and different layouts can be realized depending on packaging technology and associated pinouts.

This application note discusses three different PCB design approaches and the cost trade-off for a high power density package. A brief comparison between simulated and measured results is subsequently explained. For the study, TI’s new TPS62866- 6 A buck converter in a 1.05-mm x 1.78-mm x 0.5-mm WCSP/DSBGA package, is considered. The package size is equal to die size in these packages for PCB space saving which makes heat dissipation from these packages more challenging.