This user’s guide describes EVM operation with respect to most digital isolator devices that come in standard pin-compatible packages. The EVM can be used for evaluation of any of TI single-channel, dual-channel, triple-channel, quad-channel, or six-channels digital isolator devices in various packages: 8-pin SOIC (D), 8-pin WB SOIC (DWV), 16-pin QSOP (DBQ), 16-pin WB SOIC (DW), and 16-pin ultra WB SOIC (DWW). This guide also describes the standard pin configurations of devices for each package, bill of materials, EVM schematic, PCB layout, and typical laboratory test setup. A typical input and output waveform is also presented.

The DIGI-ISO-EVM has provision for multiple device footprints that are unoccupied to allow for testing of various digital isolator devices from various isolator families. Figure 2-1 through Figure 2-18 show all possible device pin configurations of digital isolators with different channel options in different packages that can be tested on this EVM. The figures also provide reference to device footprint designators (like U1) of the EVM where a given digital isolator for a given channel option in a given package can be tested on the EVM. Table 2-1 can be used as a quick reference table to identify the device footprint designator where a digital isolator can be tested for a given channel and package options.

Figure 2-1 Single-Channel Digital Isolator Pin Configuration for D-8 Package on U2 and DWV-8 Package on U1

Figure 2-2 Single-Channel Digital Isolator Pin Configuration for DW-16 Package on U3

Figure 2-3 Single-Channel Digital Isolator Pin Configuration for DWW-16 Package on U5

Figure 2-4 Dual-Channel (ISOxx20) Digital Isolator Pin Configurations for D-8 Package on U2 and DWV-8 Package on U1

Figure 2-5 Dual-Channel (ISOxx21) Digital Isolator Pin Configurations for D-8 Package on U2 and DWV-8 Package on U1

Figure 2-6 Dual-Channel (ISOxx20) Digital Isolator Pin Configurations for DW-16 Package on U3

Figure 2-7 Dual-Channel (ISOxx21) Digital Isolator Pin Configurations for DW-16 Package on U3

Figure 2-8 Dual-Channel (ISOxx20) Digital Isolator Pin Configurations for DWW-16 Package on U5

Figure 2-9 Dual-Channel (ISOxx21) Digital Isolator Pin Configurations for DWW-16 Package on U5

Figure 2-10 Triple-Channel (ISOxx30) Digital Isolator Pin Configurations for DBQ-16 Package on U6, DW-16 Package on U4, and DWW-16 Package on U5

Figure 2-11 Triple-Channel (ISOxx31) Digital Isolator Pin Configurations for DBQ-16 Package on U6, DW-16 Package on U4, and DWW-16 Package on U5

Figure 2-12 Quad-Channel (ISOxx40) Digital Isolator Pin Configurations for DBQ-16 Package on U6, DW-16 Package on U4, and DWW-16 Package on U5

Figure 2-14 Quad-Channel (ISOxx42) Digital Isolator Pin Configurations for DBQ-16 Package on U6, DW-16 Package on U4, and DWW-16 Package on U5

Figure 2-13 Quad-Channel (ISOxx41) Digital Isolator Pin Configurations for DBQ-16 Package on U6, DW-16 Package on U4, and DWW-16 Package on U5

Figure 2-15 Six-Channel (ISOxx60) Digital Isolator Pin Configurations for DBQ-16 Package on U7 and DW-16 Package on U8

Figure 2-17 Six-Channel (ISOxx62) Digital Isolator Pin Configurations for DBQ-16 Package on U7 and DW-16 Package on U8

Figure 2-16 Six-Channel (ISOxx61) Digital Isolator Pin Configurations for DBQ-16 Package on U7 and DW-16 Package on U8

Figure 2-18 Six-Channel (ISOxx63) Digital Isolator Pin Configurations for DBQ-16 Package on U7 and DW-16 Package on U8

Figure 3-1 shows the 3D diagram of the EVM.

Figure 3-1 DIGI-ISO-EVM 3D Diagram