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  • Mitigating UART Receiver Glitches While Switching Modes on RS-485 Transceivers

    • SLLA660 December   2024 THVD1400 , THVD2410

       

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  • Mitigating UART Receiver Glitches While Switching Modes on RS-485 Transceivers
  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Overview of RS-485
  6. 3 Shorting DE and nRE Pins
  7. 4 General R Pin Glitch Background
  8. 5 Theoretical Glitch Case for RS-485 Transceivers
  9. 6 Theoretical THVD24XX Idle Fail-safe Case
  10. 7 RS-485 Testing Setup
  11. 8 THVD1400 Capacitance Results
  12. 9 THVD2410 Capacitance Results
  13. 10Voltage Drop Workarounds
  14. 11Summary
  15. 12References
  16. IMPORTANT NOTICE
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Application Note

Mitigating UART Receiver Glitches While Switching Modes on RS-485 Transceivers

Abstract

When the receiver line “R” is pulled high on a RS-485 transceiver, a transition from transmitting to receiving can initiate a start condition in UART. When a half-duplex transceiver is switched from transmitting to receiving, the R line can experience a temporary voltage drop. The voltage drop on the R line can cause an unexpected start bit, generating a communication error. This application note explores the cause behind this false start condition and how to remove the false start.

Trademarks

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