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TAS2552 4.0-W Class-D Mono Audio Amplifier with Class-G Boost and Speaker Sense
SLAS898B
January 2014 – April 2015
TAS2552
PRODUCTION DATA.
CONTENTS
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TAS2552 4.0-W Class-D Mono Audio Amplifier with Class-G Boost and Speaker Sense
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
Handling Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements/Timing Diagrams
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
General I2C Operation
7.3.2
Single-Byte and Multiple-Byte Transfers
7.3.3
Single-Byte Write
7.3.4
Multiple-Byte Write and Incremental Multiple-Byte Write
7.3.5
Single-Byte Read
7.3.6
Multiple-Byte Read
7.3.7
PLL
7.3.8
Gain Settings
7.3.9
Class-D Edge Rate Control
7.3.10
Battery Tracking AGC
7.3.11
Configurable Boost Current Limit (ILIM)
7.4
Device Functional Modes
7.4.1
Audio Digital I/O Interface
7.4.1.1
Right-Justified Mode
7.4.1.2
Left-Justified Mode
7.4.1.3
I2S Mode
7.4.1.4
Audio Data Serial Interface Timing (I2S, Left-Justified, Right-Justified Modes)
7.4.1.5
DSP Mode
7.4.1.6
DSP Timing
7.4.2
TDM Mode
7.4.3
PDM Mode
7.4.3.1
DOUT Timing - PDM Output Mode
7.5
Register Map
7.5.1
Register Map Summary
7.5.2
Register 0x00: Device Status Register
7.5.3
Register 0x01: Configuration Register 1
7.5.4
Register 0x02: Configuration Register 2
7.5.5
Register 0x03: Configuration Register 3
7.5.6
Register 0x04: DOUT Tristate Mode
7.5.7
Register 0x05: Serial Interface Control Register 1
7.5.8
Register 0x06: Serial Interface Control Register 2
7.5.9
Register 0x07: Output Data Register
7.5.10
Register 0x08: PLL Control Register 1
7.5.11
Register 0x09: PLL Control Register 2
7.5.12
Register 0x0A: PLL Control Register 3
7.5.13
Register 0x0B: Battery Tracking Inflection Point Register
7.5.14
Register 0x0C: Battery Tracking Slope Control Register
7.5.15
Register 0x0D: Reserved Register
7.5.16
Register 0x0E: Battery Tracking Limiter Attack Rate and Hysteresis Time
7.5.17
Register 0x0F: Battery Tracking Limiter Release Rate
7.5.18
Register 0x10: Battery Tracking Limiter Integration Count Control
7.5.19
Register 0x11: PDM Configuration Register
7.5.20
Register 0x12: PGA Gain Register
7.5.21
Register 0x13: Class-D Edge Rate Control Register
7.5.22
Register 0x14: Boost Auto-Pass Through Control Register
7.5.23
Register 0x15: Reserved Register
7.5.24
Register 0x16: Version Number
7.5.25
Register 0x17: Reserved Register
7.5.26
Register 0x18: Reserved Register
7.5.27
Register 0x19: VBAT Data Register
8
Applications and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Typical Application - Digital Audio Input
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Audio Input/Output
8.2.1.2.2
Mono/Stereo Configuration
8.2.1.2.3
Boost Converter Passive Devices
8.2.1.2.4
EMI Passive Devices
8.2.1.2.5
Miscellaneous Passive Devices
8.2.1.3
Application Performance Plots
8.2.2
Typical Application - Analog Audio Input
8.2.2.1
Design Requirements
8.2.2.2
Detailed Design Procedure
8.2.2.2.1
Audio Input/Output
8.2.2.3
Application Performance Plots
8.2.3
Typical Application - Maximum Output Power, Analog Audio Input
8.2.3.1
Design Requirements
8.2.3.2
Detailed Design Procedure
8.2.3.3
Application Performance Plots
8.3
Initialization
9
Power Supply Recommendations
9.1
Power Supplies
9.2
Power Supply Sequencing
9.3
Boost Supply Details
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
10.3
Package Dimensions
11
Device and Documentation Support
11.1
Trademarks
11.2
Electrostatic Discharge Caution
11.3
Glossary
12
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
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