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  • TPSI31P1-Q1Functional Safety FIT Rate, FMD, and Pin FMA

    • SFFSA14A October   2024  – June 2025 TPSI31P1-Q1

       

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  • TPSI31P1-Q1Functional Safety FIT Rate, FMD, and Pin FMA
  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
  7. 5Revision History
  8. IMPORTANT NOTICE
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Functional Safety Information

TPSI31P1-Q1
Functional Safety FIT Rate, FMD, and Pin FMA

Trademarks

All trademarks are the property of their respective owners.

1 Overview

This document contains information for the TPSI31P1-Q1 (SSOP package) to aid in a functional safety system design. Information provided are:

  • Functional safety failure in time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (pin FMA)

Figure 1-1 shows the device functional block diagram for reference.

TPSI31P1-Q1 Functional Block
                    Diagram Figure 1-1 Functional Block Diagram

The TPSI31P1-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.

2 Functional Safety Failure In Time (FIT) Rates

This section provides functional safety failure in time (FIT) rates for the TPSI31P1-Q1 device based on two different industry-wide used reliability standards:

  • Table 2-1 provides FIT rates based on IEC TR 62380 / ISO 26262 part 11
  • Table 2-2 provides FIT rates based on the Siemens Norm SN 29500-2
Table 2-1 Component Failure Rates per IEC TR 62380 / ISO 26262 Part 11
FIT IEC TR 62380 / ISO 26262FIT (Failures Per 109 Hours)
Total component FIT rate19
Die FIT rate3
Package FIT rate16

The failure rate and mission profile information in Table 2-1 comes from the reliability data handbook IEC TR 62380 / ISO 26262 part 11:

  • Mission profile: Motor control from table 11 or figure 16
  • Power dissipation: 250mW
  • Climate type: World-wide table 8 or figure 13
  • Package factor (lambda 3): Table 17b or figure 15
  • Substrate material: FR4
  • EOS FIT rate assumed: 0 FIT
Table 2-2 Component Failure Rates per Siemens Norm SN 29500-2
TableCategoryReference FIT RateReference Virtual TJ
5CMOS, BICMOS
ASICs analog and mixed = <50V supply
25 FIT55°C

The reference FIT rate and reference virtual TJ (junction temperature) in Table 2-2 come from the Siemens Norm SN 29500-2 tables 1 through 5. Failure rates under operating conditions are calculated from the reference failure rate and virtual junction temperature using conversion information in SN 29500-2 section 4.

 

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