DRV8144-Q1 Half Bridge Driver Functional Safety FIT Rate, FMD and Pin FMA

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1 Overview

This document contains information for DRV8144-Q1 to aid in a functional safety system design. This document covers all the device package and interface variants as listed below:

HW variant in VQFN-HR package
SPI "S" variant in VQFN-HR package

Information provided are:

Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
Component failure modes and their distribution (FMD) based on the primary function of the device
Pin failure mode analysis (Pin FMA) for all the package and interface variants

Figure 1-1 shows the HW device variant's functional block diagram for reference.

Figure 1-1 Functional Block Diagram for HW variant

Figure 1-2 shows the SPI "S" device variant's functional block diagram for reference.

Figure 1-2 Functional Block Diagram for SPI "S" variant

Figure 1-3 shows the SPI "P" device variant's functional block diagram for reference.

Figure 1-3 Functional Block Diagram for SPI "P" variant

DRV8144-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.

ADVANCE INFORMATION for preproduction products; subject to change without notice.

2 Functional Safety Failure In Time (FIT) Rates

This section provides Functional Safety Failure In Time (FIT) rates for DRV8144-Q1 based on two different industry-wide used reliability standards:

Table 2-1 provides FIT rates based on IEC TR 62380 / ISO 26262 part 11
Table 2-2 provides FIT rates based on the Siemens Norm SN 29500-2

Table 2-1 Component Failure Rates per IEC TR 62380 / ISO 26262 Part 11

FIT IEC TR 62380 / ISO 26262	FIT (Failures Per 10⁹ Hours)
FIT IEC TR 62380 / ISO 26262	HW variant in VQFN-HR package	SPI "S" variant in VQFN-HR package
Total Component FIT Rate	25	25
Die FIT Rate	13	13
Package FIT Rate	12	12

The failure rate and mission profile information in Table 2-1 comes from the Reliability data handbook IEC TR 62380 / ISO 26262 part 11:

Mission Profile: Motor Control from Table 11
Power dissipation: 1150 mW
Climate type: World-wide Table 8
Package factor (lambda 3): Table 17b
Substrate Material: FR4
EOS FIT rate assumed: 0 FIT

Table 2-2 Component Failure Rates per Siemens Norm SN 29500-2

Table	Category	Reference FIT Rate	Reference Virtual T_J
5	CMOS,BICMOS Digital, analog / mixed	25 FIT	55°C

The Reference FIT Rate and Reference Virtual T_J (junction temperature) in Table 2-2 come from the Siemens Norm SN 29500-2 tables 1 through 5. Failure rates under operating conditions are calculated from the reference failure rate and virtual junction temperature using conversion information in SN 29500-2 section 4.

3 Failure Mode Distribution (FMD)

The failure mode distribution estimation for DRV8144-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.

Table 3-1 Die Failure Modes and Distribution

Die Failure Modes	Failure Mode Distribution (%)
Output is stuck LOW when commanded OFF (GND short)	14%
Output is stuck HIGH when commanded OFF (VM short)	14%
Output is stuck OFF when commanded LOW (Open)	8%
Output is stuck OFF when commanded HIGH (Open)	8%
Output ON resistance too high when commanded LOW	12%
Output ON resistance too high when commanded HIGH	19%
Low side slew rate too fast or too slow (high-side recirculation)	5%
High side slew rate too fast or too slow (low-side recirculation)	5%
Dead-time is too short	1%
Current sense feedback incorrect	3%
ITRIP current regulation incorrect	3%
Incorrect communication (SPI variant)/ configuration interpretation (HW variant)	4%⁽¹⁾
Incorrect input interpretation (nSLEEP, DRVOFF, IN)	3%⁽¹⁾
Incorrect nFAULT assertion	1%

(1) 1% for each pin function