SNAS881A
April 2025 – May 2025
LMK3C0105-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
I2C Interface Specification
6
Parameter Measurement Information
6.1
Output Format Configurations
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Device Block-Level Description
7.3.2
Device Configuration Control
7.3.3
OTP Mode
7.3.4
I2C Mode
7.4
Device Functional Modes
7.4.1
Fail-Safe Inputs
7.4.2
Fractional Output Dividers
7.4.2.1
FOD Operation
7.4.2.2
Digital State Machine
7.4.2.3
Spread-Spectrum Clocking
7.4.2.4
Integer Boundary Spurs
7.4.3
Output Behavior
7.4.3.1
Output Format Selection
7.4.3.2
REF_CTRL Operation
7.4.4
Output Enable
7.4.4.1
Output Enable Control
7.4.4.2
Output Enable Polarity
7.4.4.3
Separate Output Enable
7.4.4.4
Output Disable Behavior
7.4.5
Device Default Settings
7.5
Programming
7.5.1
I2C Serial Interface
7.5.2
One-Time Programming Sequence
8
Device Registers
8.1
Register Maps
8.1.1
R0 Register (Address = 0x0) [reset = 0x0861/0x0863]
8.1.2
R1 Register (Address = 0x1) [reset = 0x5599]
8.1.3
R2 Register (Address = 0x2) [reset = 0xC28F]
8.1.4
R3 Register (Address = 0x3) [reset = 0x1804]
8.1.5
R4 Register (Address = 0x4) [reset = 0x0000]
8.1.6
R5 Register (Address = 0x5) [reset = 0x0000]
8.1.7
R6 Register (Address = 0x6) [reset = 0x0AA7]
8.1.8
R7 Register (Address = 0x7) [reset = 0x5D1F]
8.1.9
R8 Register (Address = 0x8) [reset = 0xC28F]
8.1.10
R9 Register (Address = 0x9) [reset = 0x3000/0x1000]
8.1.11
R10 Register (Address = 0xA) [reset = 0x0010]
8.1.12
R11 Register (Address = 0xB) [reset = 0x4000]
8.1.13
R12 Register (Address = 0xC) [reset = 0x6800]
8.1.14
R238 Register (Address = 0xEE) [reset = 0x0000]
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Application Block Diagram Examples
9.2.2
Design Requirements
9.2.3
Detailed Design Procedure
9.2.3.1
Example: Changing Output Frequency
9.2.3.2
Crosstalk
9.3
Power Supply Recommendations
9.3.1
Power-Up Sequencing
9.3.2
Decoupling Power Supply Inputs
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Receiving Notification of Documentation Updates
10.2
Support Resources
10.3
Trademarks
10.4
Electrostatic Discharge Caution
10.5
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGT|16
MPQF119H
サーマルパッド・メカニカル・データ
RGT|16
QFND802
発注情報
snas881a_oa
Data Sheet
LMK3C0105-Q1
Reference-less 5-LVCMOS-Output Programmable BAW Clock Generator