How to Unlock JTAG and Debug the Hardware Security Module (HSM) on Jacinto7 Security Enabled Devices with Lauterbach

Abstract

This user guide describes the process for unlocking JTAG and accessing the Hardware Security Module (HSM) with Lauterbach’s TRACE32™ debugger. The instructions provided in this guide apply to all Jacinto 7 Security Enabled (HS-SE) devices that contain the Security Management Subsystem Generation 2 architecture.

Trademarks

TRACE32™ is a trademark of Lauterbach GmbH.

Arm® and Cortex® are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

All trademarks are the property of their respective owners.

1 Introduction

The Jacinto7 Security Management Subsystem (SMS) is composed of two Arm® Cortex®-M4F cores. The primary core is referred to as the TI Foundational Security Module (TIFS) and executes TI foundational security functions. Furthermore, the secondary core is referred to as the Hardware Security Module (HSM) and is used for running customer or third party security functionality. This user guide describes the process for unlocking JTAG and accessing the HSM (Arm Cortex - M4F Secure Core 1) with Lauterbach’s TRACE32 on Jacinto7 security enabled devices.

Figure 1-1 Security Management Subsystem Generation 2 Architecture