The Jacinto7 J721E (DRA829/TDA4xM) EVM is a standalone test, development, and evaluation module system that enables developers to write software and develop hardware around Jacinto7 J721E (DRA829/TDA4xM) processor subsystem. The J721E processor is a KeyStone™ III-based Multicore Arm® System-on-Chip (SoC). It is a super-set processor/device and may be available is different configurations targeted for specific markets. This EVM will support development of the super-set device (J721E) as well as the market specific devices (DRA829/TDA4xM). Many features of the J721E system are available on the EVM, which gives developers the basic resources needed for most general-purpose type.

The J721E EVM is comprised of:

• J721E System On Module (SOM) board
• Jacinto7 Common Processor Board (CPB)
• Quad-Port Ethernet board (QPENet)

J721E EVM sub system has been designed to enable customers to evaluate the Processor’s performance with flexibility. To have flexibility while developing the system, different interface/expansion boards have been designed. Some examples include:

• Infotainment Expansion Board
• Gateway/Ethernet Switch/Industrial (GESI) Expansion Board
• Fusion CSI2 Expansion Board(s)

The J721E EVM is a high performance, standalone development platform that enables users to evaluate the Texas Instrument’s Keystone III System-on-Chip (SoC).

Below are the EVM’s key features:

• Processor:
  • J721E (DRA829/TDA4xM), 24 mm x 24 mm, 0.8 mm pitch, 827‐pin FCBGA
  • Support for corresponding socket
• Power Supply:
  • 12 V DC nominal input (6 V‐28 V input range)
  • Optimized Power Management Solution for Processor
  • Integrated Power Measurement
• Memory:
  • DRAM, LPDDR4‐3733, 4GByte total memory, support inline ECC
  • 2x Octal‐SPI NOR flash, 512 Mb memory (8 bit) + 512 Mb memory (4 bit)
  • HyperFlash + HyerRAM, 512 Mb flash memory + 256 Mb RAM
  • UFS Flash memory, 32GByte, 2Lane, Gear3
  • eMMC Flash memory, 16 GB memory, v5.1 compliant
  • MicroSD Card Cage, UHS‐I
  • Inter-Integrated Circuit (I2C) EEPROM, 1 Mbit
• JTAG/Emulator:
  • Integrated XDS110 Emulator support
  • External emulator through 60pin MIPI Connector
  • Trace Support through 60pin MIPI Connector
  • Includes adapters for 14pin and 20pin CTI
• Supported Interfaces and Peripherals:
  • 4x CAN Interfaces, full CAN‐FD support
  • 1x USB3.1 Type C Interface, support DFP, DRP, UFP modes
  • 4x USB2.0 Host Interfaces (2x for external cables)
  • 1x Display Port, up to 4K resolution with MST support
  • 1x FPD‐Link Panel Interface, Gen3
  • 1x Audio Codec (PCM3168A), supports 2x Line Inputs, 4x Microphone Inputs, 2x Line Outputs, 6x Headphone Outputs
  • 1x FPD‐Link Radio Tuner Interface
  • 2x PCIe Card Slot, 1x PCIe M.2 Slot (M‐Key), all Gen3
  • 5x Gbit Ethernet, 1x RGMII/DP83867 + 1x QSGMII/VSC8514
  • 6x Universal Asynchronous Receiver/Transmitter (UART) terminals via 2x USB FTDI (UART‐over‐USB)
  • 2x I3C headers
  • 1x ADC Header
• Expansion Connectors to support application specific add‐on boards
  • MLB, MLBP Expansion Interface
  • Image/Video Capture Expansion Interface
  • Apple Authentication Module Interface
  • General Expansion Interface
• REACH and RoHS Compliant

There is elevated heat on the processor/heatsink, use caution particularly at elevated ambient temperatures! Although the processor/heatsink is not a burn hazard, caution should be used when handling the EVM due to increased heat in the area of the heatsink.

Figure 1-1 Thermal Caution

In compliance with the Article 33 provision of the EU REACH regulation, this EVM includes component(s) containing at least one Substance of Very High Concern (SVHC) above 0.1%. These uses from Texas Instruments do not exceed 1 ton per year. The SVHC’s are listed in Table 1-1.

Components installed on the product are sensitive to Electrostatic Discharge (ESD). It is recommended this product be used in an ESD controlled environment. This may include a temperature and/or humidity controlled environment to limit the buildup of ESD. It is also recommended to use ESD protection such as wrist straps and ESD mats when interfacing with the product.

The product is used in the basic electromagnetic environment as in laboratory conditions, and the applied standard is as per EN IEC 61326-1:2021.

Figure 2-1 J721E EVM Board

Figure 2-2 shows the overall architecture of the J721E EVM.

A. Only one board can be connected to Expansion connector at a time.

B. Only one board can be connected to CSI2 Expansion connector at a time.

Figure 2-2 System Architecture Interface

The J721E EVM System on Module (SoM) board, a Jacinto7 Common Processor board, and Quad-Port Ethernet Board. Detailed descriptions of these cards are explained in the following sections.

Figure 2-5 Jacinto7 Common Processor Component Identification

Because the Jacinto7 Common Processor board is used with different SOM boards featuring different Jacinto7 processors with different feature sets, some of the board’s peripherals/interfaces may not be supported. For the J721E SOM, the following interfaces are not supported:

• USB 3.0 uAB (USB Type C, and 2x USB Type A interfaces are supported)
• 2nd DisplayPort interface (single DisplayPort interface is supported)

These interfaces are identified with a grey color in the component placement pictures (opposed to the yellow color).