The TMS320F2833x/2823x and TMS320F2837xD/2837xS/2807x are device members of the C2000 MCU product family. These devices are most commonly used in embedded control applications. The TMS320F2837xD/2837xS/2807x devices feature an updated version of the enhanced control peripherals found on the TMS320F2833x/2823x, which allows for greater flexibility and improved application performance. In addition, the TMS320F2837xD/2837xS/2807x devices feature a boot mode flow which enables expanded booting options that provide the ability to use alternate boot mode selection pins. Enhancements to the CPU include the addition of a trigonometric math unit (TMU) and a Viterbi/Complex Math Unit (VCU-II). Other device enhancements include eight cross-bars (XBARs) for providing a flexible means for interconnecting multiple inputs, outputs, and internal resources.

For the purposes of migration, these devices will be referenced in two groups:

• TMS320F2833x and TMS3202823x - these devices will be referenced as the F2833x and F2823x, respectively. When referenced as both the F2833x and F2823x, this combined group of devices may be referenced as F2833x/23x . If a feature is unique to a specific device type, it will be referenced as F2833x or F2823x.
• TMS320F2837xD, TMS320F2837xS and TMS320F2807x - these devices will be referenced as the F2837xD, F2837xS and F2807x respectively. The combined group of devices may be referenced as F2837xD/S/07x . If a feature is unique to a specific device type, it will be referenced as F2837xD, F2837xS or F2807x.

For a full list of devices currently available within the F2833x/23x and F2837xD/S/07x families, see the TI website at http://www.ti.com/c2000.

As the focus of this document is to describe the differences between the two device groups, the descriptions are explained only to the extent of highlighting areas that require attention when moving an application from one device to the other. For a detailed description of features specific to each device, see the device-specific technical reference manuals available on the TI website. This application report does not cover the silicon exceptions or advisories that may be present on each device.

Consult the following silicon errata for specific advisories and workarounds:

• TMS320F2833x, TMS320F2823x DSCs Silicon Errata
• TMS320F2837xD Dual-Core MCUs Silicon Errata
• TMS320F2837xS MCUs Silicon Errata
• TMS320F2807x MCUs Silicon Errata

The following abbreviations are used in this document:

• F2833x: Refers to the TMS320F2833x devices. Specifically, TMS320F28335, TMS320F28334, TMS320F28333 and TMS320F28332 . The individual devices in this group are abbreviated as F28335, F28334, F28333 and F28332.
• F2823x: Refers to the TMS320F2823x devices. Specifically, TMS320F28235, TMS320F28234 and TMS320F28232 . The individual devices in this group are abbreviated as F28235, F28234 and F28232.
• F2837xD: Refers to the TMS320F2837xD devices. Specifically, TMS320F28379D, TMS320F28378D, TMS320F28377D, TMS320F28376D, TMS320F28375D and TMS320F28374D. The individual devices in this group are abbreviated as F28379D, F28378D, F28377D, F28376D, F28375D and F28374D.
• F2837xS: Refers to the TMS320F2837xS devices. Specifically, TMS320F28379S, TMS320F28378S, TMS320F28377S, TMS320F28376S, TMS320F28375S and TMS320F28374S. The individual devices in this group are abbreviated as F28379S, F28378S, F28377S, F28376S, F28375S and F28374S.
• F2807x: Refers to the TMS320F2807x devices. Specifically, TMS320F28076 and TMS320F28075. The individual devices in this group are abbreviated as F28076 and F28075.

The F2837xD/S/07x devices extend the capabilities of the existing TI C28x 32-bit fixed-point CPU architecture by adding a trigonometric math unit (TMU) and a Viterbi/Complex Math Unit (VCU-II). No changes have been made to existing instructions, pipeline, or memory bus architecture and programs written for the C28x CPU are completely compatible with these architectural enhancements.

The Trigonometric Math Unit (TMU) is an extension of the FPU and the C28x instruction set, and it efficiently executes trigonometric and arithmetic operations commonly found in control system applications. Similar to the FPU, the TMU provides hardware support for IEEE-754 single-precision floating-point operations. Seamless code integration is accomplished by built-in compiler support that automatically generates TMU instructions where applicable. This dramatically increases the performance of trigonometric functions, which would otherwise be very cycle intensive. All TMU instructions use the existing FPU register set (R0H to R7H) to carry out their operations. Since the TMU uses the same register set and flags as the FPU, there are no special considerations relating to interrupt context save and restore.

The VCU-II is the second-generation Viterbi, Complex Math, and CRC extension to the C28x CPU. The VCU-II extends the capabilities of the C28x CPU by adding registers and instructions to accelerate the performance of FFTs and communications-based algorithms such as Viterbi decoding and Cyclic Redundancy Check.

The C28x CPU, FPU, TMU and VCU architecture and instruction set are documented in the following reference guides:

• TMS320C28x CPU and Instruction Set Reference Guide
• TMS320C28x Extended Instruction Sets Technical Reference Manual
• C2000 Real-Time Control Peripherals Reference Guide
  • This document describes the differences for the above ‘unit’ types; where a type change represents a major functional feature difference.