• Easy-to-use evaluation board to fan out low-phase noise clocks
• Simple, fast device configuration and setup
• Control pin(s) configurable through jumpers
• Single supply input powered at either 1.8 V, 2.5 V, or 3.3 V
• Differential or single-ended input clocks accepted
• EVM supports four differential LVDS outputs. Both output banks are available for testing

The LMK1D1208 is a high-performance, low-additive jitter clock buffer. This has two universal input buffers that support differential clock inputs which can be selected by the control pin. The device also features on-chip bias generators that can provide LVDS common-mode voltage for AC-coupled differential clock inputs.

The evaluation module (EVM) is designed to demonstrate the electrical performance of the LMK1D1208. This fully assembled and factory-tested evaluation board allows complete validation of device functionalities. For optimum performance, the board is equipped with SMA connectors and well-controlled, 50-Ω impedance microstrip transmission lines.

The LMK1D1208 supports single-ended inputs up to 250 MHz and differential inputs up to 2 GHz. Each device provides up to eight LVDS outputs operating at the input frequency.

For more information, see the LMK1D1208 Low Additive Jitter LVDS Buffer data sheet (SNAS815) for details.