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| ACRONYM | DEFINITION |
|---|---|
| PHY | Physical Layer Transceiver |
| MAC | Media Access Controller |
| SMI | Serial Management Interface |
| MDIO | Management Data I/O |
| MDC | Management Data Clock |
| RGMII | Reduced Gigabit Media Independent Interface |
| MII | Media Independent Interface |
| SFD | Start-of-Frame Detection |
| VDDA | Analog Core Supply Rail |
| VDDIO | Digital Supply Rail |
| PD | Pulldown |
| PU | Pullup |
| MC | Microcontroller |
| AFE | Analog Front End |
| SEFI | Single Event Functional Interrupt |
The DP83561-SP is a radiation hardened, high reliability gigabit Ethernet PHY designed for hostile environments like those found in space, avionics, or downhill drilling. The DP83561-SP is a low power, fully featured Physical Layer transceiver with integrated PMD sub-layers to support 10BASE-Te, 100BASE-TX and 1000BASE-T Ethernet protocols.
The DP83561EVM is a tool used to highlight the features of the DP83561-SP Ethernet PHY. Breakout connectors are included to allow MAC access and back-to-back configuration support. The EVM also provides on-board tools to configure PHY registers using a USB-MDIO graphical user interface tool. The EVM can be powered by a single Wide-Vin 5V-36V power supply or through a microUSB cable.