In power design for applications such as ADC, RF transceiver and analog front end (AFE), output voltage ripple is an important factor for power quality evaluation. In previous DC-DC power supply, two-stage power design, including buck converter and LDO, are normally used to support low output voltage ripple requirement. In recent years, a type of power design using buck converter and secondary stage passive filter attracts more attention. Compared with conventional design with LDO, reduced design size and total efficiency improvement can be achieved. But a pair of conjugate poles can be introduced by the added passive filter, which threatens the loop stability.

In buck regulators portfolio of TI, low ripple and low noise power designs TPS6291x and TPSM8291x (3V-17V input) with unique integrated compensation can cover 12V input rail. To fill the gap of one-stage low ripple power design with higher input voltage, the design method of second stage filter for a general purpose peak current mode buck converter is introduced in this application note series. TPS62933F with 3.8V to 30V input and 3A max current is used as the example to illustrate the design method.