Subsystem Design
SPI to I2C Bridge
1 Design Description
This subsystem serves as a SPI-to-I2C bridge. In this subsystem, the MSPM0 device is the SPI Peripheral and I2C Controller. When a SPI controller transmits to the bridge SPI peripheral, the peripheral collects all the received data. Once the peripheral reaches the expected maximum message, the peripheral transmits the data using the I2C controller. The device sends an I2C transmit request and waits for I2C data from the I2C target. When the I2C controller finishes reading the data, the bridge waits for a SPI controller to send a request to read the data from the bridge. Finally, the bridge transmits the I2C controller received data through the bridge SPI peripheral.
Figure 1-1 System Functional Block Diagram2 Required Peripherals
Two MSPM0 peripherals are used for this subsystem: the SPI and I2C.
Table 2-1 Peripherals
| Sub-Block Functionality | Peripheral Use | Notes |
|---|---|---|
| SPI Peripheral | SPI | Called SPI_INST in code. |
| I2C Controller | I2C | Called I2C_INST in code. Default 100kHz transmission rate. |