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  • Power Sequencer

    • SLAAEE7A September   2024  – August 2025 MSPM0C1106 , MSPM0G1106 , MSPM0G1107 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1

       

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  • Power Sequencer
  1.   1
  2. 1 Description
  3. 2 Required Peripherals
  4. 3 Design Steps
  5. 4 Design Considerations
  6. 5 Software Flow Chart
  7. 6 Design Results
  8. 7 Reference
  9. 8 E2E
  10. 9 Revision History
  11. 10Trademarks
  12. IMPORTANT NOTICE
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Subsystem Design

Power Sequencer

1 Description

The power sequencing example demonstrates turning on multiple rails from one start-up, at different intervals. This precaution helps prevent damaging devices during start-up that causes power spikes, bus contention, latch-up errors, and other issues. The MSPM0 allows for use of only one timer to set different intervals for each rail.

MSPM0G3507 Subsystem Functional Block DiagramFigure 1-1 Subsystem Functional Block Diagram

2 Required Peripherals

This application requires the one timer, four output pins, and one input pin. The number of output pins can vary depending on application needs.

Table 2-1 Required Peripherals
Subblock Function Peripheral Use Notes
Interrupt trigger 1 pin Signal input for trigger
Output signals 4 pins Output signals for sequencing
Creating sequence 1 Timer G Called TIME_SEQUENCE in code

3 Design Steps

  1. Determine the desired time interval between each rail at start-up. The time interval set is counted sequentially from rail to rail not the start point. See Design Considerations for instructions on calculating the intervals.
  2. Determine the desired time interval between each rail at shutdown. The time interval set is counted sequentially from rail to rail not the start point. Alternatively, outputs can be shutdown all at once.
  3. Configure peripherals in SysConfig. Select a timer, configure with a chosen frequency, and set interrupt as a zero event. Set the input interrupt as rising and falling edge. Choose pins for input voltage and output rails.
  4. Modify the desired time intervals in the application code. Time intervals are place at the top of the .c file.

4 Design Considerations

  1. Multiple rails: The number of rails for this application can be increased or decreased. Only minor edits are needed to implement the number of rails.
    1. The array size for the interval time sequences needs to match the number of rails chosen. The two arrays referenced are gTimerUp[] and gTimerDown[].
    2. If rails are added or subtracted edits need to be made to the pinToggle function for each GPIO output.
  2. Sequence order: The application as written has a specific order for the sequence. To change the order of rails triggered, change the # in GPIO_OUT_PIN_#_PIN that is found in the pinToggle function to the desired order in the if statement.
  3. Clock settings: Maximum interval resolution is dependent on the frequency of the timer. Timer clock settings need to be adjusted depending on system clock settings. There is a direct relationship between how fast to clock the timer and the resolution of time between rails. The faster you clock the timer, the more resolution there is between; however, as the input clock frequency increases, the total possible time between rails is decreased.
  4. Calculating intervals: SysConfig gives period range and resolution based on the set frequency for the MSPM0 family. In the example code, the resolution is 7.81ms while the clock frequency is set to 128Hz. The period for the desired intervals can be calculated by dividing the desired time by the resolution.
  5. Port settings: Some devices of the MSPM0 family offer multiple ports. If more than one port is in use, the GPIO code portions of the application have to be modified to use multiple ports.
  6. Connection of external devices to output pins: External devices can be controlled in this type of application in different ways. Three common methods are explored in the following list:
    1. Enable Pin: No additional actions are needed for the output.
    2. Direct Power: If an external device is being powered by the output, modifications need to be made as well as considerations about the output current limitation located in the device data sheet.
    3. External Power Circuitry: If external circuitry is needed for powering of another device, for example an external GPAMP, then the output is like the enable pin situation in 6.a. External circuitry varies on each system, and is beyond the scope of this document.

5 Software Flow Chart

MSPM0G3507 Application Software Flow
                    Chart Figure 5-1 Application Software Flow Chart

6 Design Results

Figure 6-1 shows the logic graph results from executing the code example. The end is assuming the pins are also turned off in sequence.

MSPM0G3507 Sequence Result Graph Figure 6-1 Sequence Result Graph
  • P0: 498.6ms (2.01Hz)
  • P1: 404.72ms (2.47Hz)
  • P2: 607.12ms (1.65Hz)
  • P3: 801.68ms (1.25Hz)
  • P4: 102. 28ms (9.78Hz)
  • P5: 202.36ms (4.94Hz)
  • P6: 303.56ms (3.29Hz)
  • P7: 404.72ms (2.47Hz)

 

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