Design Goals
| Input | Output | Supply | ||||||
|---|---|---|---|---|---|---|---|---|
| VinMin | VinMax | VoutMin | VoutMax | VccU1 | VeeU1 | VccU2 | VeeU2 | Vref |
| –10 V | +10 V | 0.1 V | 4.9 V | 5 V | GND | +15 V | –15 V | 4.096 V |
Design Description
This design translates a wide bipolar signal to a small unipolar signal. A common application is to translate a ±12-V bipolar analog input to a 0 V to 5 V unipolar signal. This topology is frequently used in analog input modules to translate a large bipolar input signal to a unipolar signal for driving an analog-to-digital converter (ADC). The document provides equations needed to calculate component values for other range requirements. Important error sources are documented using calculations and simulation.
Design Notes
Specifications
| Parameter | Design Goal | Simulated |
|---|---|---|
| VoutMin | 0.1 V | 0.10996 V |
| VoutMax | 4.9 V | 4.8992 V |
| Bandwidth | N/A | 1.82 MHz |
| Noise | N/A | 51.5 μVRMS |
Design Steps
Design Option
Below is an optional version of the circuit without an input buffer. The main advantage of this implementation is to reduce the cost and complexity. The disadvantage is that the input impedance is much lower than a standard op amp (Rin = Ra + Rb || Rc ). If this option is selected, choosing larger values for the input resistor network is helpful. For the example, input impedance for the circuit shown is Rin = 13.1 kΩ, increasing Ra to 100 kΩ increases the resistance to 131 kΩ. Using larger values for these resistors increases the system noise, and offset due to bias current.
DC Transfer Characteristics
The following image shows the DC Transfer function for the standard and buffered version of the circuit. Note that any inaccuracy in the transfer function can be accounted for with a simple calibration (for more details, see the Calibration video).
AC Transfer Characteristics
The bandwidth of this circuit is limited by the RC filter and the gain bandwidth for the two amplifiers. The filter bandwidth was selected in Design Steps to be 2 MHz, and the amplifier bandwidth is GBWOPA328 = 40 MHz and GBWOPA206 = 3.6 MHz. Thus, the overall bandwidth of the circuit is approximately equal to the RC filter bandwidth (simulated bandwidth fc = 2.83 MHz). Additional details on bandwidth limitations are given in the Bandwidth video series.
Noise Simulation
Total noise is approximately 51.5 μVRMS. Peak-to-peak is approximately 6 × RMS = 309 µVpp. The noise is a combination of the OPA206 noise, OPA328, and resistor noise. The filter capacitor minimizes the resistor noise and current noise impact from the OPA328. For more information on noise analysis and optimization see the Noise video series.
Stability Simulation
This circuit is frequently used to drive an ADC input. Generally, for this application an ADC input filter is used. The values required for this circuit are different depending on the ADC requirements, but RC = (1 nF) (50 Ω) is a common filter. This example shows 61.2 deg of phase margin for the OPA328 driving the typical filter. For more information on stability see the Stability video series.
Design Featured Devices and Alternative Parts for Input Buffer
| Device | Key Features | Alternative Devices |
|---|---|---|
| OPA206 | 36-V supply, 3.6-MHz bandwidth,
input-overvoltage-protected, super beta, e-trim™ op amp |
Precision, 36-V supply op amps |
| OPA182 | 36-V supply, 5-MHz bandwidth, zero-drift, low-noise | 36-V supply, zero-drift op amps |
Design Featured Devices and Alternative Parts for Output Amplifier
| Device | Key Features | Alternative Devices |
|---|---|---|
| OPA328 | 5-V supply, 40-MHz bandwidth, slew rate 30 V / μs, zero-crossover, 50-μV offset voltage, RRIO | 5 V, zero-crossover |
| OPA387 | 5-V supply, 13-MHz bandwidth, ultra-high precision (2 µV), zero-drift (0.003 µV / C), low-input-bias-current op amp (single), RRIO | 5 V, zero-drift |
| OPA397 | 5-V supply, 13-MHz bandwidth, slew rate 4.5 V / μs, low-offset (60 µV), low-bias-current, low noise 6.5 nV / √Hz, RRIO e-trim™ op amp | 5 V, RRIO e-trim™ |
Design References
See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.
See the circuit PSpice® simulation file SBOMCG1.
See circuit TINA-TI simulation file SBOMCG0.
For more information on many op-amp topics including common-mode range, output swing, bandwidth, and how to drive an ADC please visit TI Precision Labs.
For additional layout guidelines, see the OPAx328 Precision, 40-MHz, 1.0-pA, Low-Noise, RRIO, CMOS Operational Amplifier With Shutdown and OPAx206 Input-Overvoltage-Protected, 4-μV, 0.08-μV/°C, Low-Power Super Beta, e-trim™ Op Amps data sheets.
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