SBAA287B May 2018 – December 2022 ADS114S06 , ADS114S06B , ADS114S08 , ADS114S08B
This document describes the differences between the standard and cost-optimized versions of the ADS114S06 and ADS114S08 (ADS114S0x) devices. Texas Instruments provides cost-optimized, B-grade versions of each device for systems that may not require the performance level and feature set offered by the standard devices. Table 1-1 lists the standard versus B-grade devices.
This application note also describes how the differences apply to the ADS114S08 evaluation module (EVM) because there is no dedicated EVM for the B-grade versions.
| Standard Device | B-Grade Device | 
|---|---|
| ADS114S06 | ADS114S06B | 
| ADS114S08 | ADS114S08B | 
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The 6-channel ADS114S06 and 12-channel ADS114S08 are 16-bit, 4000 sample-per-second (SPS), delta-sigma analog-to-digital converters (ADCs). These devices offer an integrated analog front-end that consists of:
The ADC performance and feature set make these devices an excellent choice for all types of precision sensor measurements in end-equipment such as:
Figure 1-1 illustrates the functional block diagram for these two ADCs.
Figure 1-1 Functional Block DiagramThe differences between the standard and B-grade versions are separated into three different categories:
These categories are discussed in detail in the following sections.
The ADS114S06B and ADS114S08B have some relaxed specifications to help optimize cost and enable use in end-equipment that does not require the performance of the standard-grade ADCs. Table 2-1 summarizes these relaxed specifications and compares their values to the standard-grade devices.
| PARAMETER | TEST CONDITIONS | ADS114S06 ADS114S08  | ADS114S06B ADS114S08B  | UNIT | ||||
|---|---|---|---|---|---|---|---|---|
| MIN | TYP | MAX | MIN | TYP | MAX | |||
| Operating ambient temperature | –50 | 125 | –40 | 125 | °C | |||
| Absolute input current | PGA enabled, all gains | 0.1 | ±2 | 0.1 | ±10 | nA | ||
| INL (best fit) | PGA bypassed, VCM = AVDD / 2  | 1 | 10 | 1 | ppmFSR | |||
| PGA enabled, gain = 1 to 8, VCM = AVDD / 2 | 2 | 15 | 2 | 25 | ||||
| PGA enabled, gain = 16 to 128, VCM = AVDD / 2 | 3 | 15 | 2 | 25 | ||||
| Gain error | TA = 25°C, PGA bypassed | 0.004% | 0.012% | 0.01% | 0.1% | |||
| TA = 25°C, PGA enabled, gain = 1 to 32  | 0.004% | 0.012% | 0.025% | 0.2% | ||||
| TA = 25°C, PGA enabled, gain = 64 and 128  | 0.004% | 0.02% | 0.025% | 0.2% | ||||
| VREF accuracy | TA = 25°C, TQFP package | –0.05% | ±0.01% | 0.05% | –0.2% | ±0.01% | 0.2% | |
| TA = 25°C, QFN package | –0.1% | ±0.01% | 0.1% | –0.2% | ±0.01% | 0.2% | ||
| VREF temperature drift | TA = –40°C to +85°C | 2.5 | 8 | 8 | 40 | ppm/°C | ||
| TA = –50°C to +125°C | 3 | 10 | N/A | |||||
| IDAC accuracy (each IDAC) | TA = 25°C, 10 µA to 100 µA | –5% | ±0.7% | 5% | –6% | ±1% | 6% | |
| TA = 25°C, 250 µA to 2 mA | –3% | ±0.5% | 3% | –6% | ±1% | 6% | ||
| IDAC current mismatch | TA = 25°C, 10 µA to 100 µA | 0.15% | 0.8% | 0.20% | ||||
| TA = 25°C, 250 µA to 750 µA | 0.1% | 0.6% | 0.20% | |||||
| TA = 25°C, 1 mA to 2 mA | 0.07% | 0.4% | 0.20% | |||||
| IDAC temperature drift | 10 µA to 750 µA | 20 | 120 | 100 | ppm/°C | |||
| 1 mA to 2 mA | 10 | 80 | 100 | |||||
| IDAC temperature drift matching | 10 µA to 100 µA | 3 | 25 | 10 | ppm/°C | |||
| 250 µA to 2 mA | 2 | 15 | 10 | |||||
| Oscillator accuracy | –1.5% | 1.5% | –2% | 2% | ||||
| Device cost | ADS114S06 | ADS114S06B | USD ($) | |||||
| ADS114S08 | ADS114S08B | |||||||