SLLSEC4B June   2013  – August 2016 HVDA551-Q1 , HVDA553-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristic
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Digital Inputs and Outputs
      2. 8.3.2 Using the HVDA553 With Split Termination
      3. 8.3.3 Protection Features
        1. 8.3.3.1 TXD Dominant State Time Out
        2. 8.3.3.2 Thermal Shutdown
        3. 8.3.3.3 Undervoltage Lockout or Unpowered Device
        4. 8.3.3.4 Floating Pins
        5. 8.3.3.5 CAN Bus Short-Circuit Current Limiting
    4. 8.4 Device Functional Modes
      1. 8.4.1 Bus States by Mode
      2. 8.4.2 Normal Mode
      3. 8.4.3 Standby Mode With RXD Wake-Up Request
        1. 8.4.3.1 RXD Wake-Up Request Lockout for Bus-Stuck Dominant Fault (HVDA551)
      4. 8.4.4 Driver and Receiver Function Tables
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 3.3-V I/O Voltage Level in Low-Power Mode
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Loop Propagation Delay
        3. 9.2.1.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resource
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature
    • Device HBM ESD Classification Level:
      • Level 3B for Pins 6 and 7
      • Level 3A for All Other Pins
    • Device CDM ESD Classification Level C6
  • Meets or Exceeds the Requirements of ISO 11898-2 and ISO 11898-5
  • GIFT/ICT Compliant
  • Data Rate Up to 1 Mbps
  • ESD Protection Up to ±12 kV (Human-Body Model) on Bus Pins
  • I/O Voltage Level Adapting
    • HVDA551: Adaptable I/O Voltage Range (VIO) From 3 V to 5.33 V
  • SPLIT Voltage Source
    • HVDA553: Common-Mode Bus Stabilization
  • Operating Modes:
    • Normal Mode
    • Low-Power Standby Mode With RXD Wake-Up Request
  • High Electromagnetic Compliance (EMC)
  • Supports CAN Flexible Data-Rate (FD)
  • Protection
    • Undervoltage Protection on VIO and VCC
    • Bus-Fault Protection of –27 V to 40 V
    • TXD Dominant State Time-Out
    • RXD Wake-Up Request Lockout on CAN Bus Stuck Dominant Fault (HVDA551)
    • Digital Inputs Compatible With 5-V Microprocessors (HVDA553)
    • Thermal Shutdown Protection
    • Power-Up and Power-Down Glitch-Free Bus I/O
    • High Bus Input Impedance When Unpowered (No Bus Load)

2 Applications

  • SAE J2284 High-Speed CAN for Automotive Applications
  • SAE J1939 Standard Data Bus Interface
  • GMW3122 Dual-Wire CAN Physical Layers
  • ISO 11783 Standard Data Bus Interface
  • NMEA 2000 Standard Data Bus Interface

3 Description

The HVDA55x-Q1 device is designed and qualified for use in automotive applications and meets or exceeds the specifications of the ISO 11898 High Speed CAN (Controller Area Network) Physical Layer standard (transceiver).

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
HVDA551-Q1
HVDA553-Q1		 SOIC (8) 4.90 mm × 3.91 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

HVDA551 Block Diagram

HVDA551-Q1 HVDA553-Q1 fbd_hvda551_SLLSEC4.gif

HVDA553 Block Diagram

HVDA551-Q1 HVDA553-Q1 fbd_hvda553_llsec4.gif