Using the TPSM5601R5H-IBB-EVM

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1 EVM Setup

Figure 1-1 highlights the user interface items associated with the EVM. The VIN Power terminal block (J1) is used for connection to the host input supply and the –VOUT Power terminal block (J4) is used for connection to the load. These terminal blocks accept up to a 16-AWG wire.

Figure 1-1 EVM User Interface

Use the VIN S+ and VIN S– test points along with the –VOUT Sense and GND Sense test points located near the power terminal blocks as voltage monitoring points where voltmeters can be connected to measure VIN and –VOUT. Do not use the monitoring test points as the input supply or output load connection points. The PCB traces connecting to these test points are not designed to support high currents.
Use the VIN scope test points (J2) and –VOUT scope test points (J3) to monitor VIN and –VOUT waveforms with an oscilloscope. Use these jumpers with the tip-and-barrel method. The two sockets of each test point are on 0.1-in centers. Connect the scope probe tip to the upper socket pin labeled "•" and connect the scope ground lead to the lower socket pin.
The control test points located near the bottom and top left of the EVM test the features of the device. Refer to Table 2-1 for more information on the individual control test points.
The –VOUT Select jumper (J5) is provided to select the desired negative output voltage:
- –2.5 V
- –3.3 V
- –5 V
- –12 V
- –15 V
Before applying power to the EVM, make sure that the jumper is present and properly positioned for the intended output voltage. Always remove input power before changing the jumper settings.
The device can be turned on or off using the system enable (SYS_EN) jumper (J6). Place the jumper in the ON position to enable the device or in the OFF position to disable the device. If the jumper is left open, the EVM will default to the OFF state. The undervoltage lockout (UVLO) can be set by populating resistors R8 and R9 located on the bottom side of the EVM. If the ENABLE/UVLO feature is not needed, remove resistor R9 from the board and place the jumper on the VIN_EN jumper (J7).
The power good (PGOOD) test point is available to monitor when a valid output voltage is present on the EVM. Additionally, the PG_PU pin is present as a convenient point to connect a pullup voltage for the PGOOD signal.
The frequency response test point (INJ) along with the –VOUT Sense test point is available to inject a sinusoidal signal into the system and measure the gain/phase response characteristics of the device.

2 EVM Connectors and Test Points

Wire-loop test points and scope probe sockets are included for digital voltmeters (DVM) or oscilloscope probes to aid in the evaluation of the device. Table 2-1 describes each test point.

Table 2-1 Test Point Descriptions

TEST POINT⁽¹⁾	DESCRIPTION
VIN S+	Input voltage monitor. Connect the positive lead of a DVM to this point to measure efficiency.
VIN S–	Input ground monitor. Connect the negative lead of a DVM to this point to measure efficiency.
–VOUT Sense	Negative output voltage monitor. Connect the negative lead of a DVM to this point for measuring efficiency, line regulation, and load regulation.
GND Sense	Output ground monitor. Connect the positive lead of a DVM to this point for measuring efficiency, line regulation, and load regulation.
GND	System ground test points
VIN Scope (J2)	Input voltage scope monitor. Connect an oscilloscope probe to this set of points to measure input ripple voltage.
–VOUT Scope (J3)	Negative output voltage scope monitor. Connect an oscilloscope probe to this set of points to measure negative output voltage ripple and transient response.
SYS_EN (J6)	System enable select jumper. Use the control header (J6) to enable or disable the device using a jumper. The SYS_EN test point is connected to the level-shifting circuitry to activate the enable circuit. A minimum supply voltage of 5 V on the SYS_EN test point is required to turn on the enable circuitry. Do not exceed 20 V on this test point. Failing to adhere to these constraints can result in damaged components. To monitor the enable signal, monitor the EN_TP testpoint.
VIN_EN (J7)	Enable tied to the VIN jumper. The enable pin is tied directly to VIN, which allows the device to start up when VIN is within its valid operating range. The enable test point (EN_TP) is connected directly to the enable pin of the device to monitor the enable signal. Do not connect this test point to ground or any other signal. If enable/disable feature is desired, then use the system enable select jumper (J6).
PGOOD	Power-good test point. Monitors the power-good signal of the device. A level-shifting circuitry is implemented on the EVM to allow a proper reading state of the pin.
PG_PU	PGOOD pullup test point. Apply 5 V to this pin or any other DC voltage less than 18 V to use as a pullup voltage for the PGOOD signal. A pullup resistor and level-shifting circuitry is implemented on the EVM for proper utilization.
INJ	Frequency response test point. Inject a sinusoidal signal to this test point (system) to measure the gain and phase response characterstocs of the device.

(1) Refer to the product data sheet for absolute maximum ratings associated with the features in this table.