• Menu
  • Product
  • Email
  • PDF
  • Order now
  • Error Calculation for Unbuffered R2R DAC – Example Using DAC11001A

    • SLAAE47A May   2022  – August 2022 DAC11001A , DAC11001B

       

  • CONTENTS
  • SEARCH
  • Error Calculation for Unbuffered R2R DAC – Example Using DAC11001A
  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2DAC Error Sources
    1. 2.1 Offset Error
    2. 2.2 Gain Error
    3. 2.3 Integral Non Linearity (INL)
    4. 2.4 Noise Sources
  5. 3Error Sources from Reference
    1. 3.1 Initial Accuracy
    2. 3.2 Temperature Drift
    3. 3.3 Load Regulation Error
    4. 3.4 Line Regulation Error
    5. 3.5 0.1 - 10 Hz Peak-to-Peak Noise
    6. 3.6 Example Using REF7025
  6. 4Error Sources from Inverting and Non-Inverting Gain Stage
    1. 4.1 Input Offset Voltage Error
    2. 4.2 Input Offset Voltage Drift Error
    3. 4.3 Power Supply Rejection Ratio (PSRR) Error
    4. 4.4 Open Loop Gain Error
    5. 4.5 Resistor Tolerance Error
  7. 5Example Calculation using DAC11001A
  8. 6Error Summary
  9. 7References
  10. 8Revision History
  11. IMPORTANT NOTICE
search No matches found.
  • Full reading width
    • Full reading width
    • Comfortable reading width
    • Expanded reading width
  • Card for each section
  • Card with all content

 

APPLICATION NOTE

Error Calculation for Unbuffered R2R DAC – Example Using DAC11001A

Abstract

The 20-bit DAC11001A is a highly accurate, low-noise, voltage-output, single-channel, digital-to-analog converters (DACs). The DAC11001 are specified monotonic by design, and offer excellent linearity of less than 4 LSB (max) across all ranges. The unbuffered voltage output offers low noise performance (7 nV/√Hz) in combination with a fast settling time (1µs), making this device an excellent choice for low-noise, fast control-loop, and waveform generation applications. When designing for these applications, its is necessary to calculate the total error contributed by the DAC and the associated circuit components. This report helps in understanding various DAC errors and how to calculate the total error in the system.

Trademarks

All trademarks are the property of their respective owners.

1 Introduction

This application report describes how to calculate the total error in a DAC11001 system from various components like reference, reference buffer, output buffer, and the DAC itself. Figure 1-1 shows an example circuit topology using DAC11001 to get a 20 bit linear output. In this example, REF6025 used as reference and OPA828 as output and reference buffer respectively.

Figure 1-1 Circuit Topology
Table 1-1 Design Inputs
Parameters Specifications
Output Voltage ±5 V
Reference source2.5 V
Output TypeBuffered
Resolution20-bit
Operating Temperature Range-40 to 125°C

2 DAC Error Sources

Static errors, errors that affect the accuracy of the converter when it is converting static (dc) signals, can be described using four terms. These terms are offset error, gain error, integral nonlinearity and differential nonlinearity. Each term can be expressed in least significant bit (LSB) units or as a percentage of the full-scale range (FSR). For example, an error of ½ LSB for an 8-bit converter corresponds to 0.2% FSR. Figure 2-1 shows DAC ideal and actual transfer function. All the error sources and calculations in this document is expressed in parts-per-million (ppm).

Figure 2-1 DAC Ideal and Actual Transfer Function

 

Texas Instruments

© Copyright 1995-2025 Texas Instruments Incorporated. All rights reserved.
Submit documentation feedback | IMPORTANT NOTICE | Trademarks | Privacy policy | Cookie policy | Terms of use | Terms of sale